发明授权
- 专利标题: Fast flash EPROM programming and pre-programming circuit design
- 专利标题(中): 快速闪存EPROM编程和预编程电路设计
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申请号: US444314申请日: 1995-05-18
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公开(公告)号: US5615153A公开(公告)日: 1997-03-25
- 发明人: Tom D. Yiu , Ray L. Wan , Ling-Wen Hsiao , Tien-Ler Lin , Fuchia Shone
- 申请人: Tom D. Yiu , Ray L. Wan , Ling-Wen Hsiao , Tien-Ler Lin , Fuchia Shone
- 专利权人: Yiu; Tom D.,Wan; Ray L.,Hsiao; Ling-Wen,Lin; Tien-Ler,Shone; Fuchia
- 当前专利权人: Yiu; Tom D.,Wan; Ray L.,Hsiao; Ling-Wen,Lin; Tien-Ler,Shone; Fuchia
- 主分类号: G11C16/10
- IPC分类号: G11C16/10 ; G11C16/12 ; G11C16/16 ; G11C16/24 ; G11C16/04
摘要:
A circuit for speeding up the pre-programming of floating gate storage transistors such as FLASH EPROMS, and particularly speeding up the pre-programming of a block or array of floating gate storage transistors includes a controllable voltage source that supplies gate programming potential across the control gate and source of the FLASH EPROM transistor cells to be programmed. A control circuit is provided that controls the voltage source to vary the gate programming potential during a programming interval as a function of time in order to decrease the time required for a given amount of charge movement to program the selected floating gate transistors. The wordline voltages are varied, while the source voltage is held constant. By starting at a lower wordline voltage, and increasing during the programming interval to a high wordline voltage, the programming speed is increased, and the high final turn-on threshold voltage for the programmed floating gate storage transistors is achieved. In addition, in order to speed up pre-programming, a programming potential is applied to four wordlines in parallel during a single programming interval. Further, the load on cells being programmed is adjusted to improve programming speed.
公开/授权文献
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