Invention Grant
US5627992A Organization of an integrated cache unit for flexible usage in supporting microprocessor operations 失效
集成缓存单元的组织,用于支持微处理器操作

  • Patent Title: Organization of an integrated cache unit for flexible usage in supporting microprocessor operations
  • Patent Title (中): 集成缓存单元的组织,用于支持微处理器操作
  • Application No.: US434494
    Application Date: 1995-05-04
  • Publication No.: US5627992A
    Publication Date: 1997-05-06
  • Inventor: Gigy Baror
  • Applicant: Gigy Baror
  • Applicant Address: CA Sunnyvale
  • Assignee: Advanced Micro Devices
  • Current Assignee: Advanced Micro Devices
  • Current Assignee Address: CA Sunnyvale
  • Main IPC: G06F12/08
  • IPC: G06F12/08 G06F12/10 G06F12/00
Organization of an integrated cache unit for flexible usage in
supporting microprocessor operations
Abstract:
A computer system having a cache memory subsystem which allows flexible setting of caching policies on a page basis and a line basis. A cache block status field is provided for each cache block to indicate the cache block's state, such as shared or exclusive. The cache block status field controls whether the cache control unit operates in a write-through write mode or in a copy-back write mode when a write hit access to the block occurs. The cache block status field may be updated by either a TLB write policy field contained within a translation look-aside buffer entry which corresponds to the page of the access, or by a second input independent of the TLB entry which may be provided from the system on a line basis.
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