发明授权
US5636177A Static random access memory with improved noise immunity 失效
具有改善抗噪声性能的静态随机存取存储器

Static random access memory with improved noise immunity
摘要:
A semiconductor static random access memory (SRAM) device having a noise eliminating means is disclosed. The SRAM device includes a memory cell array, a row detector, a column detector, an address buffer, an access control pulse generator, a sense amplifier and an address transition detector. The address buffer receives an externally issued memory access address for relay to the row decoder for the decode of the row address. The received access address is also relayed to the address transition detector in order to detect the transition status of the address bits of the access address received so as to cause the access control pulse generator to generate a sense amplifier enable signal and a word line enable signal. The noise eliminator means receives the sense amplifier enable signal and the word line enable signal and conducts a logical OR conversion of the signals which is issued to the sense amplifier, in order to enable the sense amplifier to implement the data access to the SRAM device without allowing the noise interference to cause erroneous data over the device data bus.
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