发明授权
- 专利标题: Integrated circuit isolation process
- 专利标题(中): 集成电路隔离过程
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申请号: US366053申请日: 1994-12-29
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公开(公告)号: US5643825A公开(公告)日: 1997-07-01
- 发明人: Mark I. Gardner , Fred N. Hause , Kuang-Yeh Chang
- 申请人: Mark I. Gardner , Fred N. Hause , Kuang-Yeh Chang
- 申请人地址: CA Sunnyvale
- 专利权人: Advanced Micro Devices, Inc.
- 当前专利权人: Advanced Micro Devices, Inc.
- 当前专利权人地址: CA Sunnyvale
- 主分类号: H01L21/762
- IPC分类号: H01L21/762 ; H01L21/76
摘要:
An improved process is provided for forming field dielectric in lieu of local oxidation process often referred to as the "LOCOS" process. The improved process utilizes blanket formation of first and second dielectrics across an entire semiconductor substrate. In a subsequent step, both first and second dielectrics are selectively removed in areas overlying active regions. The first and second dielectrics are formed using a combination of thermal growth and/or chemical deposition. The resulting field dielectric structure is relatively thin, yet demonstrates superior dielectric properties. Blanket formation followed by select removal ensures a fine-line demarcation between field and active regions and substantially eliminates encroachment problems normally associated with conventional LOCOS. Additionally, the thin field dielectric structure can be formed with rounded or reflowed corners to avoid step coverage problems for subsequently placed conductive elements.
公开/授权文献
- US5093806A Sensing and decoding scheme for a BiCMOS read/write memory 公开/授权日:1992-03-03
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