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发明授权
US5708599A Semiconductor memory device capable of reducing power consumption 失效
能够降低功耗的半导体存储器件

Semiconductor memory device capable of reducing power consumption
摘要：
A reference voltage generated in a Vref1 generating circuit is supplied from a corresponding applied voltage selector to respective backgates of access transistors in each SRAM cell constituting a column which is selected by a column decoder. On the other hand, a substrate voltage generated in a Vbb generating circuit is supplied from a corresponding applied voltage selector to respective backgates of access transistors in each SRAM cell constituting a column which is not selected by the column decoder.
摘要（中）：

在Vref1发生电路中产生的参考电压从对应的施加电压选择器提供给构成由列解码器选择的列的每个SRAM单元中的存取晶体管的各个后栅。 另一方面，在Vbb发生电路中产生的衬底电压从相应的施加电压选择器提供给构成未由列解码器选择的列的每个SRAM单元中的存取晶体管的各个后栅。

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