发明授权
- 专利标题: Low consumption analog multiplier
- 专利标题(中): 低功耗模拟乘法器
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申请号: US575872申请日: 1995-12-21
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公开(公告)号: US5714903A公开(公告)日: 1998-02-03
- 发明人: Melchiorre Bruccoleri , Gaetano Cosentino , Marco Demicheli , Salvatore Portaluri
- 申请人: Melchiorre Bruccoleri , Gaetano Cosentino , Marco Demicheli , Salvatore Portaluri
- 申请人地址: ITX Agrate Brianza ITX Catania
- 专利权人: SGS-Thompson Microelectronics S.r.l.,Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
- 当前专利权人: SGS-Thompson Microelectronics S.r.l.,Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
- 当前专利权人地址: ITX Agrate Brianza ITX Catania
- 优先权: EPX94830590 19941227
- 主分类号: G06G7/16
- IPC分类号: G06G7/16 ; G06G7/163 ; G06F7/44
摘要:
An analog multiplier includes at least a differential output stage formed by a pair of emitter-coupled bipolar transistors. Each transistor of the pair of emitter-coupled bipolar transistors is driven by a predistortion stage having a reciprocal of a hyperbolic tangent transfer function that is attributable to the base currents of the bipolar transistors used in the predistortion stage. The error in the output signal produced by the analog multiplier is compensated by generating replicas of the base currents of the bipolar transistors of the differential output stage and forcing those replica currents on the output node of a respective predistortion stage. Various embodiments that consume different amounts of power are described.
公开/授权文献
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