A two-dimensional discrete cosine transform computing circuit has a transform block, formed by a multiplication unit and a Hadamard transform unit, which performs computations in a sequence of Hadamard transforms followed by multiplications in a two-dimensional discrete cosine transform, and in a sequence of multiplication followed by Hadamard transforms in an inverse two-dimensional discrete cosine transform. A memory block temporarily stores input/output data of the transform block; an input/output processing block performs pre-processing and post-processing such as cumulative addition and subtraction of input/output data of the transform block. A control block controls, when performing processing for either a two-dimensional discrete cosine transform or inverse two-dimensional discrete cosine transform, multiplications of coefficients in the transform block, read/write of the memory block, and the input/output processing block. This configuration achieves high-speed processing and a reduction in scale of the circuitry.