发明授权
- 专利标题: Method for generating a topology map for a serial bus
- 专利标题(中): 生成串行总线拓扑图的方法
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申请号: US313679申请日: 1994-09-27
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公开(公告)号: US5724517A公开(公告)日: 1998-03-03
- 发明人: Sherri E. Cook , Andrew B. McNeill, Jr.
- 申请人: Sherri E. Cook , Andrew B. McNeill, Jr.
- 申请人地址: NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: NY Armonk
- 主分类号: G06F15/173
- IPC分类号: G06F15/173 ; H04L12/40 ; H04L12/56 ; H04L12/64 ; G06F13/00
摘要:
A method and system for mapping a node topology is disclosed. The node topology is based on a computer system comprised of a high performance acyclic serial bus and a plurality of nodes coupled to the acyclic serial bus. Each node further includes an identification packet. The mapping topology establishes a root node based upon information found in each identification packet and establishes at least one branch node among the nodes based on the information. Next, the topology mapping method selects a first available branch node among the available branch nodes based on the information. The system then identifies any of the nodes that are child nodes to the first available branch node. Upon identifying all child nodes of the branch node, the system selects a next available branch node based upon the information. The processing continues until the root node is processed as a branch node.