发明授权
US5737568A Method and apparatus to control cache memory in multiprocessor system
utilizing a shared memory
失效
在利用共享存储器的多处理器系统中控制高速缓冲存储器的方法和装置
- 专利标题： Method and apparatus to control cache memory in multiprocessor system utilizing a shared memory
- 专利标题（中）： 在利用共享存储器的多处理器系统中控制高速缓冲存储器的方法和装置
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申请号： US393927申请日： 1995-02-21
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公开(公告)号： US5737568A公开(公告)日： 1998-04-07
- 发明人: Kazumasa Hamaguchi , Shigeki Shibayama
- 申请人： Kazumasa Hamaguchi , Shigeki Shibayama
- 申请人地址： JPX Tokyo
- 专利权人： Canon Kabushiki Kaisha
- 当前专利权人： Canon Kabushiki Kaisha
- 当前专利权人地址： JPX Tokyo
- 优先权： JPX2-179541 19900709
- 主分类号： G06F12/08
- IPC分类号： G06F12/08 ; G06F13/14
摘要：
In a multiprocessor system having a shared memory containing the state of the data for every entry in each cache memory possessed by each processor. The state of the data is set to a "shared state" when the data is shared with other cache memories, and is set to a "shared stale state" when the data in the "shared state" becomes stale by updating performed in another cache memory. Each processor monitors a transaction generated on a bus, derives a data portion from the bus when it is in the same address as the data in the "shared stale state" of its own cache memory, thereby updating the data in the address and making the state of the data a "shared state".
公开/授权文献
- USD320043S Toner bottle 公开/授权日：1991-09-17
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