Invention Grant
- Patent Title: Enhanced power-on-reset/low voltage detection circuit
- Patent Title (中): 增强型上电复位/低电压检测电路
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Application No.: US555369Application Date: 1995-11-08
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Publication No.: US5744990APublication Date: 1998-04-28
- Inventor: Steven Burstein , Sharif M. Ibrahim
- Applicant: Steven Burstein , Sharif M. Ibrahim
- Applicant Address: NY Hauppauge
- Assignee: Standard Microsystems Corporation
- Current Assignee: Standard Microsystems Corporation
- Current Assignee Address: NY Hauppauge
- Main IPC: H03K17/22
- IPC: H03K17/22
Abstract:
A comprehensive power-on-reset (POR) and low voltage detection circuit combines a Power Supply Voltage Level Detection (PSVLD) circuit with an Enhanced Retriggering (ER) circuit. The PSVLD circuit establishes lower and upper thresholds of the desired operating voltage range, and provide initial POR triggering and retriggering when the supply voltage is within the desired range. The ER circuit senses a predetermined amount of drop in the power supply voltage being monitored, and generates an independent pulse at the POR node whenever such a drop occurs. Total DC current is limited to less than 2.5 microamps, while power supply voltages can be monitored for stability over the range of 2.5 to 5.5 volts.
Public/Granted literature
- US5023658A Image forming apparatus Public/Granted day:1991-06-11
Information query
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