发明授权
US5783850A Undoped polysilicon gate process for NMOS ESD protection circuits 失效
用于NMOS ESD保护电路的未掺杂多晶硅栅极工艺

Undoped polysilicon gate process for NMOS ESD protection circuits
摘要:
An improved process and integrated-circuit having CMOS (NMOS and/or PMOS) devices formed on a substrate and a NMOS electro static discharge circuit formed in a P well on the substrate. The improvement includes an electro static discharge NMOS circuit having an undoped polysilicon gate electrode, and the NMOS FET devices having n-type doped gate electrodes. The undoped gate polysilicon electrode of the electro static discharge transistor increases the gate oxide breakdown voltage thus making the ESD transistor able to withstand a greater voltage discharge and therefore providing better protection to the product devices.
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