发明授权
US5783850A Undoped polysilicon gate process for NMOS ESD protection circuits
失效
用于NMOS ESD保护电路的未掺杂多晶硅栅极工艺
- 专利标题: Undoped polysilicon gate process for NMOS ESD protection circuits
- 专利标题(中): 用于NMOS ESD保护电路的未掺杂多晶硅栅极工艺
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申请号: US663436申请日: 1996-06-13
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公开(公告)号: US5783850A公开(公告)日: 1998-07-21
- 发明人: Siu-han Liau , Jiaw-Ren Shih
- 申请人: Siu-han Liau , Jiaw-Ren Shih
- 申请人地址: TWX Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company
- 当前专利权人: Taiwan Semiconductor Manufacturing Company
- 当前专利权人地址: TWX Hsin-Chu
- 主分类号: H01L27/02
- IPC分类号: H01L27/02 ; H01L23/62
摘要:
An improved process and integrated-circuit having CMOS (NMOS and/or PMOS) devices formed on a substrate and a NMOS electro static discharge circuit formed in a P well on the substrate. The improvement includes an electro static discharge NMOS circuit having an undoped polysilicon gate electrode, and the NMOS FET devices having n-type doped gate electrodes. The undoped gate polysilicon electrode of the electro static discharge transistor increases the gate oxide breakdown voltage thus making the ESD transistor able to withstand a greater voltage discharge and therefore providing better protection to the product devices.
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