发明授权
- 专利标题： DRAM with reduced electric power consumption
- 专利标题（中）： DRAM具有降低的电力消耗
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申请号： US726168申请日： 1996-10-04
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公开(公告)号： US5867438A公开(公告)日： 1999-02-02
- 发明人: Yukihiro Nomura , Yasuharu Satoh , Yoshihiro Takemae , Takaaki Furuyama , Mitsuhiro Nagao , Masahiro Niimi
- 申请人： Yukihiro Nomura , Yasuharu Satoh , Yoshihiro Takemae , Takaaki Furuyama , Mitsuhiro Nagao , Masahiro Niimi
- 申请人地址： JPX Kawasaki JPX Kasugai
- 专利权人： Fujitsu Limited,Fujitsu VLSI Limited
- 当前专利权人： Fujitsu Limited,Fujitsu VLSI Limited
- 当前专利权人地址： JPX Kawasaki JPX Kasugai
- 优先权： JPX5-233860 19930920; JPX6-007937 19940127
- 主分类号： G11C5/14
- IPC分类号： G11C5/14 ; G11C11/406 ; G11C11/4074 ; G11C7/00
摘要：
A DRAM (dynamic Random Access Memory) having a plurality of memory cells includes a data read/write circuit reading or writing data for the memory cells, a self-refresh circuit refreshing data stored in the memory cells, and a power supply unit for supplying electric power to the data read/write circuit and the self-refresh circuit, the electric power having a first voltage level in a normal operation mode and a second voltage level in a self-refresh mode, wherein the second voltage level is lower than the first voltage level.