A non-volatile semiconductor memory device formed on a semiconductor substrate of a first conductivity type. The semiconductor memory including a plurality of recessed portions formed on a surface of the semiconductor substrate. The recessed portions having a sidewall and a bottom at which the semiconductor substrate is exposed. A gate oxide film is also directly formed on a surface of the semiconductor substrate other than the recessed portions. A floating gate electrode is formed on the gate oxide film. A source region and a drain region of a second conductivity type is formed in the semiconductor substrate at the bottom of the recessed portion and on opposing sides of the floating gate electrode. An intergate insulation film is formed on the semiconductor substrate to cover a top surface and sidewalls of the floating gate electrode, a sidewall of the recessed portion, the source region and drain region. A control gate electrode is further formed on the intergate insulation film. The intergate insulation film is in direct contact with the sidewall of the recessed portion so that the sidewall of the semiconductor substrate adjacent to the intergate insulation film forms a channel region of a field effect transistor.