A boost voltage generating circuit for a memory device prevents excessive voltage on a word line for a memory cell array and reduces power consumption by utilizing an internal array reference voltage signal as a reference signal for the boost voltage generating circuit. The circuit maintains the boost voltage power supply signal at a predetermined level independently of the voltage level of an internal peripheral reference voltage signal which is applied to a peripheral circuit and which can be increased to increase the speed of the memory device without causing excessive voltage on the word line. The boost voltage generating circuit includes a level detector circuit which receives the array reference voltage signal as a reference signal. The boost voltage generating circuit also includes a pulse generator and a pumping circuit which utilize the array reference voltage signal as a power supply.