A parallel computer using a simply structured network which allows loads on message-transferring routes to be as equally distributed as possible and which eases possible conflict between different types of messages being transferred. Given a message to be transmitted, each processor (PE) on the network references a property setup table to determine property information depending on the message type and places the information into the message. For example, a route bit RB as the property information is set to "0" or "1" depending on whether the message is originated by the sending PE or is a message acknowledging the receipt of another message. According to the RB bit in the received message, a route instruction circuit in each exchange switch (EX) references a route instruction table to determine the message destination that depends on the receiving PE number designated by the message. Each EX has a plurality of virtual channel circuits. Each virtual channel circuit has a plurality of buffers assigned beforehand to different values of the RB bit within the message. The received message is placed into the buffer corresponding to the RB bit value of the message, whereby conflict between messages is minimized.