The invention relates to an A/D conversion device having an amplifier (A) which receives an analog input signal (Vin), in which device the voltage level of reference thresholds in the output signal (Vout�0:7!) resulting from the A/D conversion of the input signal (Vin) is maintained constant by means of a regulation module (CMP1, IS), controlling the voltage which is present at the terminals of a storage capacitor (Cs). According to the invention, such a device controls the average DC component of the input signal (Vin) in the purpose of limiting the amplitude of the variations of said signal (Vin), which variations might lead to a saturation of the amplifier (A).