发明授权
US5926705A Method for manufacturing a semiconductor device with stabilization of a
bipolar transistor and a schottky barrier diode
失效
用于制造具有双极晶体管和肖特基势垒二极管稳定的半导体器件的方法
- 专利标题： Method for manufacturing a semiconductor device with stabilization of a bipolar transistor and a schottky barrier diode
- 专利标题（中）： 用于制造具有双极晶体管和肖特基势垒二极管稳定的半导体器件的方法
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申请号： US736037申请日： 1996-10-21
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公开(公告)号： US5926705A公开(公告)日： 1999-07-20
- 发明人: Takuo Nishida
- 申请人： Takuo Nishida
- 申请人地址： JPX Tokyo
- 专利权人： NEC Corporation
- 当前专利权人： NEC Corporation
- 当前专利权人地址： JPX Tokyo
- 优先权： JPX7-296276 19951019
- 主分类号： H01L21/336
- IPC分类号： H01L21/336 ; H01L21/304 ; H01L21/306 ; H01L21/8222 ; H01L21/8248 ; H01L21/8249 ; H01L27/06 ; H01L29/78
摘要：
In a method for manufacturing an LDD-structured MOS transistor and a bipolar transistor, a gate insulating layer is formed on a MOS transistor region and a bipolar transistor region. Then, a gate electrode is formed on the MOS transistor region. Then, an insulating layer is formed on the entire surface, and as etched back by a reactive ion etching process to form a sidewall spacer. The MOS transistor region and the bipolar transistor region are etched by a wet etching process using the gate electrode and its sidewall spacer as a mask.
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