发明授权
US5926709A Process of fabricating miniature memory cell having storage capacitor with wide surface area 失效
制造具有宽表面积的储能电容器的微型存储单元的工艺

Process of fabricating miniature memory cell having storage capacitor
with wide surface area
摘要:
A node contact hole is formed in an inter-level insulating layer through an anisotropic etching using an inner conductive side wall formed in a primary opening as an etching mask, and an outer conductive side wall concurrently formed from a doped polysilicon together with a conductive plug in the node contact hole increases the surface area of a storage node electrode of a stacked storage capacitor.
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