发明授权
US5935269A CRC code generation circuit, code error detection circuit and CRC
circuit having both functions of the CRC code generation circuit and
the code error detection circuit
失效
CRC代码生成电路，代码错误检测电路和具有CRC码生成电路和代码错误检测电路的功能的CRC电路
- 专利标题： CRC code generation circuit, code error detection circuit and CRC circuit having both functions of the CRC code generation circuit and the code error detection circuit
- 专利标题（中）： CRC代码生成电路，代码错误检测电路和具有CRC码生成电路和代码错误检测电路的功能的CRC电路
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申请号： US827061申请日： 1997-03-26
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公开(公告)号： US5935269A公开(公告)日： 1999-08-10
- 发明人: Yukio Kodama , Kazuo Murakami
- 申请人： Yukio Kodama , Kazuo Murakami
- 申请人地址： JPX Tokyo
- 专利权人： Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人： Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址： JPX Tokyo
- 优先权： JPX8-253340 19960925
- 主分类号： H03M13/00
- IPC分类号： H03M13/00
摘要：
When encoding data received by a dividing circuit and to be included in a CRC code word, the data is divided by a generator polynomial and remainder data resulting from the division is output from a plurality of parallel data output terminals of the dividing circuit. The remainder data is added to a CRC intrinsic value and "0" information in the adder to produce a sum. The sum is a CRC code for a CRC code word to be transmitted. When detecting code errors, data from a CRC code word is received by the dividing circuit, where the data is divided by the generator polynomial, and remainder data resulting from the division is output from the respective parallel data output terminals. The remainder data is added to the CRC intrinsic value and CRC code in the adder to produce a sum, and the sum is processed by a logical sum circuit to produce a logical sum output as a CRC flag. The CRC code generation and code error detection circuit generates CRC codes to be included in CRC code words at high speed and detects errors in received CRC code words at high speed.
公开/授权文献
- USD291840S Novelty cap or similar article 公开/授权日：1987-09-15
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