发明授权
- 专利标题: High voltage CMOS logic circuit using low voltage transistors
- 专利标题(中): 高压CMOS逻辑电路采用低压晶体管
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申请号: US985709申请日: 1997-12-05
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公开(公告)号: US5963054A公开(公告)日: 1999-10-05
- 发明人: William Thomas Cochran , Scott Wayne McLellan
- 申请人: William Thomas Cochran , Scott Wayne McLellan
- 申请人地址: NJ Murray Hill
- 专利权人: Lucent Technologies Inc.
- 当前专利权人: Lucent Technologies Inc.
- 当前专利权人地址: NJ Murray Hill
- 主分类号: H03K3/356
- IPC分类号: H03K3/356 ; H03K19/003 ; H03K19/0175 ; H03K19/094
摘要:
A logic gate arrangement for switching voltages greater than the gate breakdown voltage of the transistors in the gate. Two transistors of different conductivity types, are disposed between the N and P transistors which perform the logic function of a conventional CMOS gate. The gates of the two transistors are connected to a first voltage that is less than the breakdown voltage of the transistors, with the entire logic gate being supplied with a voltage that is greater than the first voltage. Three outputs are provided, two with limited voltage swings that drive other like gates or conventional CMOS gates and the other output having a full voltage swing. Logic gates implementing various logic functions, such as NAND and NOR, are disclosed. Further, a cross-coupled logic gate is disclosed which can operate as a latch or as a logic voltage translator circuit.
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