发明授权
US5963467A Semiconductor memory device 失效
半导体存储器件

Semiconductor memory device
摘要:
In a semiconductor memory device having a plurality of memory cells in which each memory cell is formed of an address selection MOSFET and an information storing capacitor and the plate voltage consisting of an intermediate potential is supplied to the common electrode of the information storing capacitor, the memory access is enabled by indirectly detecting that the plate voltage has reached a predetermined potential near a intermediate potential with the voltage detecting circuit or timer circuit, inhibiting the selecting operation of the word lines or precharging of the pair of bit lines to the intermediate potential when the plate voltage is lower than the predetermined potential, and then canceling the above inhibit condition after the plate voltage has reached the predetermined potential.
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