发明授权
- 专利标题: Parallel variable bit encoder
- 专利标题(中): 并行可变位编码器
-
申请号: US943527申请日: 1997-10-03
-
公开(公告)号: US5973628A公开(公告)日: 1999-10-26
- 发明人: Michael McDonnell , Hojjat Salemi
- 申请人: Michael McDonnell , Hojjat Salemi
- 申请人地址: CA San Jose
- 专利权人: Cisco Technology, Inc.
- 当前专利权人: Cisco Technology, Inc.
- 当前专利权人地址: CA San Jose
- 主分类号: H03M9/00
- IPC分类号: H03M9/00 ; H04J3/07 ; H04Q11/04 ; H03M7/40
摘要:
A data segmentation circuit is disclosed for use in DS3/STS-1 mapping. The data segmentation circuit uses a circular data buffer to store data for mapping. A recirculating barrel shifter is used for extracting data from within the buffer. A counter moves the barrel shifter window zero, one, five, or eight bits to align the barrel shifter output as necessary to extract a next datum for a next payload envelope location. Data stuffing is then performed. Control circuitry for providing throttling and bit stuffiing as required in an STS-1 information payload is disclosed.
公开/授权文献
- US5325757A Fret retractable neck for stringed musical instruments 公开/授权日:1994-07-05
信息查询