An execution processor that can carry out power calculation at high speed includes a base data register, an exponent data register, a multiplier, a multiplication input selector for selecting an input to the multiplier, first and second registers for storing a calculation result of the multiplier, a square root calculation unit, a square root calculation input selector for selecting an input to the square root calculation unit, a third register for storing a calculation result of the square root calculation unit, and a power calculation controller. The power calculation controller checks the integer region of the exponent data register for each bit while providing input/output control of the multiplication input selector, the first register, and the second register, and checks the decimal fraction region of the exponent data register for each bit to provide input/output control of the square root calculation input selector, the multiplication input selector, the first register, the second register, and the third register.