By allowing a host processor to control an intelligent Peripheral Component Interface (PCI) device's reset logic, the PCI device's programmable read only memory (also known as PROM, EEPROM, or FLASH EEPROM) can be reprogrammed without storing any reprogramming instructions (also known as PROXY code) in the PROM itself. During reprogramming operations the host processor commands the PCI device into a reset-and-hold mode. During this time the host processor downloads reprogramming instructions and replacement code into the PCI's random access memory. When released from reset, the PCI device executes the reprogramming code downloaded by the host processor.