A microprocessor card having a microprocessor is connected to a predetermined pattern of resistors for providing a binary notation signature identifying the speed capability of the microprocessor and for adjusting the speed of the clock signals for the microprocessor. A motherboard having circuitry for recognizing the binary notation signature identifying the speed capability of a microprocessor is connected to the predetermined pattern of resistors. A series of latches latch the microprocessor speed identification into a logic and lookup table circuitry. The table circuitry looks up a binary notation signature correlating the motherboard speed capability with the speed capability of the particular microprocessor. This binary notation signature, which identifies the motherboard speed in relationship to the microprocessor speed, provides the binary notation signature on the resistors and overrides the microprocessor speed identification. A series of latches latch the motherboard identification signature to multiplier circuitry to cause the multiplier circuitry to adjust the speed of clock signals to the microprocessor appropriately for the motherboard.