发明授权
- 专利标题： Asynchronous first-in-first-out buffer circuit burst mode control
- 专利标题（中）： 异步先进先出缓冲电路突发模式控制
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申请号： US828501申请日： 1997-03-31
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公开(公告)号： US6058439A公开(公告)日： 2000-05-02
- 发明人: Ian Victor Devereux
- 申请人： Ian Victor Devereux
- 申请人地址： GBX Cambridge
- 专利权人： Arm Limited
- 当前专利权人： Arm Limited
- 当前专利权人地址： GBX Cambridge
- 主分类号： G06F5/08
- IPC分类号： G06F5/08 ; G06F13/12 ; G06F13/00
摘要：
A data processing system comprising a first circuit block 6 and a second circuit block 8 linked via an asynchronous first-in-first-out buffer circuit 12 is provided with a burst marker that identifies the first word in a burst transfer or an empty stage. The second circuit block 8 uses the burst marker to identify the last data word in a burst as being that word which immediately precedes such a burst marker.
公开/授权文献
- US5165742A Vehicle window latch extender 公开/授权日：1992-11-24
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