发明授权
US6087878A Signal output circuit, parallel interface circuit and printer apparatus
失效
信号输出电路,并行接口电路和打印机
- 专利标题: Signal output circuit, parallel interface circuit and printer apparatus
- 专利标题(中): 信号输出电路,并行接口电路和打印机
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申请号: US6198申请日: 1998-01-13
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公开(公告)号: US6087878A公开(公告)日: 2000-07-11
- 发明人: Noriyuki Suzuki , Sohei Tanaka , Masafumi Wataya , Hiroshi Uemura , Nobuyuki Tsukada
- 申请人: Noriyuki Suzuki , Sohei Tanaka , Masafumi Wataya , Hiroshi Uemura , Nobuyuki Tsukada
- 申请人地址: JPX Tokyo
- 专利权人: Canon Kabushiki Kaisha
- 当前专利权人: Canon Kabushiki Kaisha
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX9-019377 19970131
- 主分类号: B41J29/38
- IPC分类号: B41J29/38 ; G06F3/00 ; G06F3/12 ; H03K5/08 ; H03K19/0175 ; H04L29/10
摘要:
An interface in accordance with IEEE 1284 has a signal output stage which is a totem pole circuit. The totem pole circuit may be damaged if its output signal line is left grounded for an extended period of time or if outputs are being delivered at both ends of the signal line. Drive by the totem pole circuit is limited to a case where a signal to be output is at a low level and to a length of time equivalent to, say, one clock period from the moment the signal makes a transition from the low to a high level. A high impedance is established at all other times during which the high level is in effect, with the high level being maintained by a pull-up resistor connected to the output signal line. As a result, the totem pole circuit will not be damaged even if the output line is grounded while at the high level.
公开/授权文献
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