A method and system according to the present invention of accessing data in a multiprocessor system including a plurality of processors and a memory, wherein the memory includes a plurality of memory locations, and wherein at least a first processor and a second processor each include a reservation indicator and a cache, each cache having a plurality of cache memory locations corresponding to the memory locations. The method and system comprises providing a Load And Reserve request from the first processor for at least one of the plurality of memory locations and determining whether the second processor includes at least one of the plurality of cache memory locations corresponding with the at least one of the memory locations; determining whether the second processor's reservation indicator is set, this determination being in response the second processor including the at least one of the cache memory locations corresponding with the at least one of the memory locations. The method and system also provides a state indicating that the at least one of the cache memory locations of the second processor corresponding to the at least one of the memory locations is invalid, responsive to the reservation indicator not being set.