The multilayer microelectronic circuit comprises a main capacitor dielectric layer, a main capacitor first electrode disposed on one of opposite sides of the main capacitor dielectric layer, a main capacitor second electrode disposed on the other of the opposite sides of the main capacitor dielectric layer in a way as to oppose the main capacitor first electrode through the main capacitor dielectric layer, a first trimming capacitor dielectric layer disposed on a side of the main capacitor first electrode opposite to the main capacitor dielectric layer, a first trimming capacitor electrode disposed on a side of the first trimming capacitor dielectric layer opposite to the main capacitor first electrode in a way as to oppose the main capacitor first electrode through the first trimming capacitor dielectric layer, a second trimming capacitor dielectric layer disposed on a side of the first trimming capacitor electrode opposite to the first trimming capacitor dielectric layer, and a second trimming capacitor electrode disposed on a side of the second trimming capacitor dielectric layer opposite to the first trimming capacitor electrode in a way as to oppose the first trimming capacitor electrode through the second trimming capacitor dielectric layer. The first trimming capacitor electrode is first trimmed for rough adjustment of a capacitance of the circuit. The second trimming capacitor electrode is then trimmed for fine adjustment of the capacitance.