发明授权
- 专利标题: Programmable logic device memory cell circuit
- 专利标题(中): 可编程逻辑器件存储单元电路
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申请号: US167637申请日: 1998-10-06
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公开(公告)号: US6115312A公开(公告)日: 2000-09-05
- 发明人: David E. Jefferson , Bruce B. Pedersen
- 申请人: David E. Jefferson , Bruce B. Pedersen
- 申请人地址: CA San Jose
- 专利权人: Altera Corporation
- 当前专利权人: Altera Corporation
- 当前专利权人地址: CA San Jose
- 主分类号: G11C11/41
- IPC分类号: G11C11/41 ; G11C7/00 ; G11C7/20 ; G11C11/412 ; G11C29/04
摘要:
A memory cell circuit for a programmable logic device is provided that allows groups of memory cells to be powered down when one or more of the memory cells in a group is defective. Each memory cell contains two cross-coupled inverters for storing programming data for the programmable logic device. A first inverter in each cell is powered by a global power signal. A second inverter in each cell is powered by a power supply signal. The memory cells are powered down by taking the global power signal low while maintaining the power supply signal high. Because the second inverter remains active during power down, the memory cells may be shut down completely. The memory cell circuit may be used to set all of the memory cells to a known state upon power up.
公开/授权文献
- US5433636A Water skiboard with rotatable binding 公开/授权日:1995-07-18
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