发明授权
US6131107A Fast determination of carry inputs from lower order product for radis-8
odd/even multiplier array
有权
快速确定radis-8奇数/偶数乘法器阵列的低阶乘积的进位输入
- 专利标题： Fast determination of carry inputs from lower order product for radis-8 odd/even multiplier array
- 专利标题（中）： 快速确定radis-8奇数/偶数乘法器阵列的低阶乘积的进位输入
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申请号： US208169申请日： 1998-12-09
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公开(公告)号： US6131107A公开(公告)日： 2000-10-10
- 发明人: Gilbert M. Wolrich , Sribalan Santhanam , Andrew S. Olesin
- 申请人： Gilbert M. Wolrich , Sribalan Santhanam , Andrew S. Olesin
- 申请人地址： TX Houston
- 专利权人： Digital Equipment Corporation
- 当前专利权人： Digital Equipment Corporation
- 当前专利权人地址： TX Houston
- 主分类号： G06F7/52
- IPC分类号： G06F7/52
摘要：
A multiplier in a floating point processor includes a circuit to determine for each bit of the multiplier operand a 3 times booth recode and a booth recode multiplier array which implements a 3 times booth recode multiplication. The multiplier includes logic to determine a fast sign extend to replace bit positions shifted in the array as well as a rounding adder to provide a rounded result while determining the final result from the booth recode multiplier. The multiplier also includes a circuit to determine a contribution to the final multiplication result from a lower order product with out forming the entire product.
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