Invention Grant
US6133757A High-speed and low-noise output buffer 有权
高速和低噪声输出缓冲器

High-speed and low-noise output buffer
Abstract:
A high-speed and low-noise output buffer with a slew control function in coordination with a GTL+ signal specification according to the invention. In the output buffer, general and speed driving elements concurrently drives a last output element. As an input signal is changed from a first logic level to a second logic level, the general and speed driving elements simultaneously start functioning. First, the speed driving element pulls down the control voltage of the output element to a potential having a potential difference from an expected final potential. Then, the general driving element pulls down the control voltage to close to the expected final potential. The output potential of the output element changes more quickly at the beginning. When close to the expected final potential, the variation of the output potential slows down. Since, the delay time of the output buffer is reduced without causing an over large ring back on the output signal, the output buffer with high-speed and low-noise can be obtained.
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