An integrated circuit and method of fabrication are disclosed for achieving electrical isolation between a spiral inductor and an underlying silicon substrate using standard semiconductor manufacturing process flow. A spiral conductor with square windings is formed in metal layer (20) patterned so that straight runs of successive turns (22, 23, 24) overlie corresponding runs of concentric square rings (16, 17, 18) formed in underlying metal layer (14). A unity gain voltage buffer (30) connects each ring (16, 17, 18) with a respective overlying turn (22, 23, 24).