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US06174785B1 Method of forming trench isolation region for semiconductor device 失效
形成半导体器件沟道隔离区的方法

  • 专利标题: Method of forming trench isolation region for semiconductor device
  • 专利标题(中): 形成半导体器件沟道隔离区的方法
  • 申请号: US09099274
    申请日: 1998-06-18
  • 公开(公告)号: US06174785B1
    公开(公告)日: 2001-01-16
  • 发明人: Kunal R. ParekhLi Li
  • 申请人: Kunal R. ParekhLi Li
  • 主分类号: H01L2176
  • IPC分类号: H01L2176
Method of forming trench isolation region for semiconductor device
摘要:
Shallow trench isolation regions in a semiconductor device are formed by utilizing sacrificial spacers such as polysilicon spacers having a rounded shape to form trench isolation areas. The spacer shape is transferred into a semiconductor substrate during an etching process to define the profile of the trench, resulting in a trench with substantially rounded upper and lower corners in the substrate. An oxide filler material is deposited in the trench and over the substrate to form a covering layer. The covering layer is then polished back to form a filled trench region which electrically isolates active areas in the substrate. The polishing step can be performed by a blanket dry etching procedure, or by a combination of chemical/mechanical planarization and wet etching. The rounded shape of the trench improves the electrical characteristics of the trench such that current leakage is decreased, and also provides a more optimized trench profile for filling the trench with the filler material.
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