发明授权
US06180977B2 Self-aligned edge implanted cell to reduce leakage current and improve program speed in split-gate flash 有权
自对准边缘植入电池,以减少漏电流并提高分闸门闪存中的编程速度

Self-aligned edge implanted cell to reduce leakage current and improve program speed in split-gate flash
摘要:
A method is provided for fabricating a self-aligned edge implanted split-gate flash memory comprising a semiconductor substrate of a first conductivity type having separated first and second regions of a second conductivity type formed therein, the first and second regions defining a substrate channel region therebetween; a floating gate separated from a doped region in the substrate by an oxide layer; a control gate partially overlying and separated by an insulator from said floating gate; said floating gate having thin portions and thick portions; and said thin portions of said floating gate overlying twice doped regions in said semiconductor substrate to reduce surface leakage current and improve program speed of the memory cell.
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