发明授权
US06182195B2 System and method for maintaining coherency of virtual-to-physical memory translations in a multiprocessor computer 失效
在多处理器计算机中维护虚拟到物理内存转换的一致性的系统和方法

  • 专利标题: System and method for maintaining coherency of virtual-to-physical memory translations in a multiprocessor computer
  • 专利标题(中): 在多处理器计算机中维护虚拟到物理内存转换的一致性的系统和方法
  • 申请号: US09123473
    申请日: 1998-07-28
  • 公开(公告)号: US06182195B2
    公开(公告)日: 2001-01-30
  • 发明人: James P. LaudonDaniel E. Lenoski
  • 申请人: James P. LaudonDaniel E. Lenoski
  • 主分类号: G06F1200
  • IPC分类号: G06F1200
System and method for maintaining coherency of virtual-to-physical memory translations in a multiprocessor computer
摘要:
A multiprocessor computer system and method for maintaining coherency between virtual-to-physical memory translations of multiple requestors in the system. A poison bit is associated with a memory block in the system. The poison bit is set to indicate that a virtual-to-physical memory translation for the memory block is stale. An exception is generated in response to an access by one of the requestors to the memory block if the poison bit is set, thereby indicating to the requestor that the virtual-to-physical memory translation entry for the memory block is stale. The virtual-to-physical memory translation for the memory block is then updated with a virtual memory translation corresponding to a new physical location for the memory block. In an embodiment having a cache-based multiprocessor system, the method further comprises the step of invalidating all cached copies of the memory block. In this case, the invalidating step and the setting step must be performed as an atomic operation.
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