A low drop-out (LDO) voltage regulator (10) and system (100) including the same are disclosed. An error amplifier (38) controls the gate voltage of a source follower transistor (24) in response to the difference between a feedback voltage (VFB) from the output (VOUT) and a reference voltage (VREF). The source of the source follower transistor (24) is connected to the gates of an output transistor (12), which drives the output (VOUT) from the input voltage (VIN) in response to the source follower transistor (24). A current mirror transistor (14) has its gate also connected to the gate of the output transistor (12), and mirrors the output current at a much reduced ratio. The mirror current is conducted through network of transistors (18, 22), and controls the conduction of a first feedback transistor (28) and a second feedback transistor (35) which are each connected to the source of the source follower transistor (24) and in parallel with a weak current source (34). The response of the first feedback transistor (28) is slowed by a resistor (32) and capacitor (30), while the second feedback transistor (35) is not delayed. As such, the second feedback transistor (35) assists transient response, particularly in discharging the gate capacitance of the output transistor (12), while the first feedback transistor (28) partially cancels load regulation effects.