A method of determining time-to-breakdown of a gate dielectric in an NFET or a PFET transistor. For an NFET transistor, the method includes providing an N+ injector ring in the p-substrate and forward biasing the N+ injector ring with respect to the p-substrate. A first positive reference voltage level is applied to the source and the drain regions. A second positive reference voltage level is applied to the gate dielectric. The first and second positive reference voltage levels are maintained on the transistor until breakdown of the gate dielectric occurs. Another embodiment of the method may be used in a PFET transistor.