发明授权
- 专利标题: Infinite sample-and-hold circuit
- 专利标题(中): 无限采样保持电路
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申请号: US09082032申请日: 1998-05-20
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公开(公告)号: US06198313B1公开(公告)日: 2001-03-06
- 发明人: Patrick F. M. Poucher , Patrick Kirby , Christopher A. Kenny , Donal Geraghty
- 申请人: Patrick F. M. Poucher , Patrick Kirby , Christopher A. Kenny , Donal Geraghty
- 主分类号: G11C2702
- IPC分类号: G11C2702
摘要:
An infinite sample-and-hold circuit which employs a DAC and an ADC coupled with a mode control circuit. In acquisition mode, the mode control circuit connects the analog input signal to the ADC. The ADC drives the DAC and when the DAC output equals the analog input, the mode control circuit disconnects the analog input and the DAC drives the output in hold mode. The mode control circuit preferably includes a comparator/buffer circuit including switching circuitry. The ADC is preferably of the successive approximation type. The comparator/buffer is used in two modes: (1) open loop, as a comparator, and (2) closed loop, as a buffer. During acquisition, the comparator mode is used, while in hold mode the buffer mode is used. The utilization of the same amplifier to provide both functions allows cancellation of offset errors otherwise introduced by the comparator and buffer, at least to a first order.
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