发明授权
US06221560B1 Method to enhance global planarization of silicon oxide surface for IC device fabrication 有权
用于增强IC器件制造的氧化硅表面的全局平坦化的方法

  • 专利标题: Method to enhance global planarization of silicon oxide surface for IC device fabrication
  • 专利标题(中): 用于增强IC器件制造的氧化硅表面的全局平坦化的方法
  • 申请号: US09373244
    申请日: 1999-08-12
  • 公开(公告)号: US06221560B1
    公开(公告)日: 2001-04-24
  • 发明人: Choi Pheng SooLap Chan
  • 申请人: Choi Pheng SooLap Chan
  • 主分类号: G03C500
  • IPC分类号: G03C500
Method to enhance global planarization of silicon oxide surface for IC device fabrication
摘要:
A new method for planarizing silicon dioxide surfaces in semiconductor structures. Starting with a structure of an underlying layer (for instance a layer of metal lines) a layer of oxide is deposited and profiled by positive tone imaging. A layer of PPMS is deposited. Using the mask of the starting structure, the PPMS layer is exposed changing the PPMS to PPMSO in the exposed regions. The unexposed PPMS is removed, the PPMSO (unexposed regions of the PPMS) are planarized, this planarization can proceed to the point where no more PPMSO is present (the PPMSO “columns” are removed together with the intra-layer of patterned oxide). The surface thus created shows excellent planarity, this surface can be further planarized down to the top level of the underlying pattern, if it is desirable to do so.
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