发明授权
US06225921B1 Device for encoding/decoding n-bit source words into corresponding m-bit channel words, and vice versa
有权
将n位源字编码/解码为相应的m位通道字的装置,反之亦然
- 专利标题: Device for encoding/decoding n-bit source words into corresponding m-bit channel words, and vice versa
- 专利标题(中): 将n位源字编码/解码为相应的m位通道字的装置,反之亦然
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申请号: US09177957申请日: 1998-10-23
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公开(公告)号: US06225921B1公开(公告)日: 2001-05-01
- 发明人: Josephus A. H. M. Kahlman , Kornelis A. Schouhamer Immink , Gijsbert J. Van Den Enden , Toshiyuki Nakagawa , Yoshihide Shimpuku , Tatsuya Narahara , Kousuke Nakamura
- 申请人: Josephus A. H. M. Kahlman , Kornelis A. Schouhamer Immink , Gijsbert J. Van Den Enden , Toshiyuki Nakagawa , Yoshihide Shimpuku , Tatsuya Narahara , Kousuke Nakamura
- 优先权: EP97202563 19971029; EP98200405 19980210
- 主分类号: H03M500
- IPC分类号: H03M500
摘要:
A device is disclosed for encoding a stream of databits of a binary source signal (S) into a stream of databits of a binary channel signal (C) satisfying a (d,k) constraint, wherein the bitstream of the source signal is divided into n-bit source words (x1, x2), which device comprises converting means (CM) adapted to convert said source words into corresponding m-bit channel words (Y1, Y2, Y2). The converting means (CM) are further adapted to convert n-bit source words into corresponding m-bit channel words, such that the conversion for each n-bit source word is parity preserving (table I). The relations hold that m>n≧1, p≧1, and that p can vary. Preferably, m=n+1. Further, a sync word generator (9) is available for generating a q-bit sync word also satisfying said (d,k) constraint, the said sync word starting with a ‘0’ bit and ending with a ‘0’ bit, the device further comprising merging means (19) for merging said sync word in said stream of databits of the binary channel signal, and that q is an integer value larger than k. (FIG. 1) Further, a decoding device is disclosed for decoding the channel signal obtained by means of the encoding device.
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