发明授权
US06232649B1 Bipolar silicon-on-insulator structure and process 失效
双极硅绝缘体结构及工艺

  • 专利标题: Bipolar silicon-on-insulator structure and process
  • 专利标题(中): 双极硅绝缘体结构及工艺
  • 申请号: US08354574
    申请日: 1994-12-12
  • 公开(公告)号: US06232649B1
    公开(公告)日: 2001-05-15
  • 发明人: Steven S. Lee
  • 申请人: Steven S. Lee
  • 主分类号: H01L27082
  • IPC分类号: H01L27082
Bipolar silicon-on-insulator structure and process
摘要:
A process for fabricating a bipolar transistor on a silicon-on-insulator substrate which includes etching a bipolar transistor area into the substrate, wherein the bipolar transistor area has substantially vertical sidewalls and a bottom, and forming a buried collector in bottom of the bipolar transistor area. Polysilicon sidewalls are formed adjacent to the vertical sidewalls in the bipolar transistor area, wherein the polysilicon sidewalls are connected to the buried collector. The polysilicon sidewalls are oxidized to form a layer of oxidized polysilicon. Oxide sidewalls are formed on the oxidized polysilicon sidewalls, and epitaxial silicon is formed to fill the bipolar transistor area. A base and an emitter are formed for the bipolar transistor, within the epitaxial barrier.
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