发明授权
US06240489B1 Method for implementing a pseudo least recent used (LRU) mechanism in a four-way cache memory within a data processing system
失效
一种用于在数据处理系统内的四路高速缓冲存储器中实现伪最近最少使用(LRU)机制的方法
- 专利标题: Method for implementing a pseudo least recent used (LRU) mechanism in a four-way cache memory within a data processing system
- 专利标题(中): 一种用于在数据处理系统内的四路高速缓冲存储器中实现伪最近最少使用(LRU)机制的方法
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申请号: US09256373申请日: 1999-02-24
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公开(公告)号: US06240489B1公开(公告)日: 2001-05-29
- 发明人: Christopher McCall Durham , Brian Patrick Hanley
- 申请人: Christopher McCall Durham , Brian Patrick Hanley
- 主分类号: G06F1200
- IPC分类号: G06F1200
摘要:
A method for implementing a pseudo least recent used mechanism in a four-way cache memory within a data processing system is disclosed. Within a four-way set associative cache memory, each congruence class contains four cache lines. Each congruence class within the cache memory is associated to a least recently used (LRU) field that has four bits. Each of four cache lines within the congruence class is then assigned with a respective set number. The set number of a cache line designated as a least recently used set among the four cache lines is stored in two bits of the LRU field. The set number of a cache line designated as a most recently used set among the four cache lines is stored in another two bits of the LRU field. In response to a determination that the set number of the least recently used set is higher than the set number of the most recently used set, one of the remaining two cache lines that has a higher set number is assigned to be a second least recently used set.