发明授权
- 专利标题: Method for forming a pattern with both logic-type and memory-type circuit
- 专利标题(中): 用逻辑型和存储型电路形成图案的方法
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申请号: US09312968申请日: 1999-05-17
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公开(公告)号: US06251564B1公开(公告)日: 2001-06-26
- 发明人: Chin-Lung Lin , Yao-Ching Ku
- 申请人: Chin-Lung Lin , Yao-Ching Ku
- 主分类号: G03C500
- IPC分类号: G03C500
摘要:
A method for forming a pattern with both a logic-type and, a memory-type circuit is disclosed. The method includes first providing a wafer which includes a photoresist layer, then covering the photoresist layer with a first mask including an opaque area and a first pattern area. Forming a first pattern on the photoresist layer by a first exposure. Covering the photoresist layer with a second mask after the first mask is removed. Moreover, a second pattern is printed on the photoresist layer by a second exposure. Finally, the second mask is removed. The double-exposure method will enhance the resolution of the pattern defined on the photoresist layer.
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