发明授权
US06255686B1 Semiconductor storage device including short circuit avoiding structure and method of fabricating thereof 失效
包括短路避免结构的半导体存储装置及其制造方法

  • 专利标题: Semiconductor storage device including short circuit avoiding structure and method of fabricating thereof
  • 专利标题(中): 包括短路避免结构的半导体存储装置及其制造方法
  • 申请号: US09124852
    申请日: 1998-07-30
  • 公开(公告)号: US06255686B1
    公开(公告)日: 2001-07-03
  • 发明人: Hideki TakeuchiHirohiko Izumi
  • 申请人: Hideki TakeuchiHirohiko Izumi
  • 优先权: JP9-347063 19971202
  • 主分类号: H01L27108
  • IPC分类号: H01L27108
Semiconductor storage device including short circuit avoiding structure and method of fabricating thereof
摘要:
In a semiconductor storage device, an access transistor, which has a gate electrode and a pair of impurity diffusion layers, is formed at a device activation region defined by a device isolation structure of a semiconductor substrate. A first insulating film, which has a first contact hole for exposing a portion of the surface of one of the pair of impurity diffusion layers, is formed over the access transistor. A protective film, which has a second contact hole formed on the first contact hole, is formed on the first insulating film. A second insulating film is formed on the side wall faces of the first and second contact holes. A memory capacitor has a lower electrode and an upper part electrode which are opposed each other and are capacitive-coupled through a dielectric film. The lower electrode is filled inside the first and second contact holes to be formed in an island-like shape on the first insulating film through the protective film so as to be electrically connected with the one of the pair of impurity diffusion layers. Each of the first and second contact holes has a diameter which is made smaller by an existence of the second insulating film than a minimum dimension determined by an exposure limit in a photolithography.
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