发明授权
US06269046B1 Semiconductor memory device having improved decoders for decoding row and column address signals
有权
半导体存储器件具有用于解码行和列地址信号的改进的解码器
- 专利标题: Semiconductor memory device having improved decoders for decoding row and column address signals
- 专利标题(中): 半导体存储器件具有用于解码行和列地址信号的改进的解码器
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申请号: US09533530申请日: 2000-03-23
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公开(公告)号: US06269046B1公开(公告)日: 2001-07-31
- 发明人: Kyu-chan Lee , Sang-man Byun
- 申请人: Kyu-chan Lee , Sang-man Byun
- 优先权: KR99-16347 19990507
- 主分类号: G11C800
- IPC分类号: G11C800
摘要:
The semiconductor memory device includes a power supply voltage (Vcc) applied to the semiconductor device, a row controller for generating an output signal in response to a control signal representing one of a normal operation state and a stand-by state, and a plurality of row decoders connected between the row controller and a plurality of word lines. Each row decoder activates a corresponding word line in response to the output signal from the row controller and a row address signal from an external source, and the output signal of the row controller is a high voltage or a ground voltage when the plurality of row decoders are in a normal operation state or in a stand-by state, respectively. The semiconductor memory device also includes a column controller for generating an output signal in response to a first control signal representing one of a normal operation state and a stand-by state and a plurality of column decoders connected between the column controller and a plurality of column selection lines. Each column decoder activates a corresponding column selection line in response to the output signal from the column controller, a column address signal, and a second control signal, and the output signal of the column controller is an internal supply voltage or the ground voltage when the plurality of column decoders are in a normal operation state or in a stand-by state, respectively. The semiconductor memory device does not generate leakage current in a stand-by state.