发明授权
US06286094B1 Method and system for optimizing the fetching of dispatch groups in a superscalar processor
有权
用于优化超标量处理器中调度组的获取的方法和系统
- 专利标题: Method and system for optimizing the fetching of dispatch groups in a superscalar processor
- 专利标题(中): 用于优化超标量处理器中调度组的获取的方法和系统
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申请号: US09263663申请日: 1999-03-05
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公开(公告)号: US06286094B1公开(公告)日: 2001-09-04
- 发明人: John Edward Derrick , Lee Evan Eisen , Hung Qui Le , Brian R. Konigsburg
- 申请人: John Edward Derrick , Lee Evan Eisen , Hung Qui Le , Brian R. Konigsburg
- 主分类号: G06F930
- IPC分类号: G06F930
摘要:
A method and system for determining if a dispatch slot is required in a processing system is disclosed. The method and system comprises a plurality of predecode bits to provide routing information and utilizing the predecode bits to allow instructions to be directed to specific decode slots and to obey dispatch constraints without examining the instructions. The purpose of this precode encoding system scheme is to provide the most information possible about the grouping of the instructions without increasing the complexity of the logic which uses this information for decode and group formation. In a preferred embodiment, pre-decode bits for each instruction that may be issued in parallel are analyzed and the multiplexer controls are retained for each of the possible starting positions within the stream of instructions.
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