In a control device for a storage device in which data streams are respectively divided into unit data, which are distributed to storage parts and are sequentially read therefrom for every unit data, there is provided a buffer memory which stores data to be written into the storage parts and data read from the storage parts. An input/output control part causes the unit data from the storage parts in an access cycle corresponding to a bit rate to be stored in the buffer memory and causes the unit data stored in the buffer memory at the bit rate to be written into the storage parts. An input/output interface part reads the unit data from the buffer memory at the bit rate and causes the data transferred at the bit rate to be stored in the buffer memory.