A semiconductor device that meets the demand for realizing semiconductor chips in small sizes. A semiconductor device in which connection lands 20 formed on the electrode terminal carrying surface of a semiconductor chip 10 are electrically connected, through connection bumps 14, to connection pads 22 formed on one surface of an interposing substrate 12 of an insulating material so as to face the connection lands 20, wherein conductor wiring patterns 24 inclusive of the connection pads 22 are formed on one surface of the interposing substrate 12, conductor wiring patterns 30 inclusive of terminal lands on where the external connection terminals 26 will be mounted, are formed on the other surface of the interposing substrate 12, and the conductor wiring patterns 24 formed on one surface of the interposing substrate 12 are connected to the conductor wiring patterns 30 formed on the other surface of the interposing substrate 12 through vias 32 formed by filling recesses with a metal by plating, the recesses being formed to penetrate through the insulating material of the interposing substrate 12 and permitting the back surfaces of the conductor wiring patterns 24 on the side of the insulating material to be exposed on the bottom surfaces thereof.