发明授权
- 专利标题： Wiring layer of a semiconductor integrated circuit
- 专利标题（中）： 半导体集成电路的接线层
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申请号： US09268678申请日： 1999-03-16
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公开(公告)号： US06313535B1公开(公告)日： 2001-11-06
- 发明人: Junichiro Iba , Masaki Narita , Tomio Katata
- 申请人： Junichiro Iba , Masaki Narita , Tomio Katata
- 优先权： JP10-068309 19980318
- 主分类号： H01L2348
- IPC分类号： H01L2348
摘要：
A wiring layer of a semiconductor integrated circuit comprises a first conductive film made of a material containing Al. A material, which reacts with Al at a rate lower than that at which Ti reacts with Al, is provided on the first conductive film. A first barrier metal film is formed, and an interlayer insulating film is formed thereon. An opening is formed in the interlayer insulating film so as to expose the first barrier metal film. The opening is buried to form a second conductive film electrically connected to the first conductive film.
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